Implementation of LDPC Decoder in FPGA (Record no. 173834)
| 000 -LEADER | |
|---|---|
| fixed length control field | 00354nam a2200121Ia 4500 |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | Mahesh (K R) |
| 245 #0 - TITLE STATEMENT | |
| Title | Implementation of LDPC Decoder in FPGA |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Year of publication | 2011 |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Amirtha Gowri (G) |
| 856 ## - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | http://library.kct.ac.in/opac-tmpl/bootstrap/THESIS/0920106008MAHESH.pdf |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Project |
| Withdrawn status | Permanent Location | Current Location | Shelving location | Date acquired | Accession Number | Koha item type |
|---|---|---|---|---|---|---|
| | Kumaraguru College of Technology | Kumaraguru College of Technology | | 2019-08-16 | P 3455 | Project |