Multilevel Computing Architecture for Parallelism on FPGA Using VHDL (Record no. 173842)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00387nam a2200121Ia 4500 |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | Sri Ram (K) |
| 245 #0 - TITLE STATEMENT | |
| Title | Multilevel Computing Architecture for Parallelism on FPGA Using VHDL |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Year of publication | 2011 |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Alagu Meenaakshi (M) |
| 856 ## - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | http://library.kct.ac.in/opac-tmpl/bootstrap/THESIS/0920106015SRIRRAM.pdf |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Project |
| Withdrawn status | Home library | Current library | Shelving location | Date acquired | Accession Number | Koha item type |
|---|---|---|---|---|---|---|
| Kumaraguru College of Technology | Kumaraguru College of Technology | 2019-08-16 | P 3462 | Project |