000 00498nam a2200229Ia 4500
008 181205s9999 xx 000 0 und d
020 _a81-7319-100-X
041 _aENGLISH
100 _aFlynn (Michael J)
100 _eAUTHOR
245 0 _aComputer Architecture:Pipelined And Parallel Processor Design
260 _c1996
300 _bPaper
300 _ePAPER BACK
300 _gNO
365 _b0
365 _b240
365 _d1
504 _a10
942 _cBK
999 _c12530
_d12530