| 000 | 00632nam a2200277Ia 4500 | ||
|---|---|---|---|
| 008 | 181205s9999 xx 000 0 und d | ||
| 020 | _a81-203-2756-X | ||
| 041 | _aENGLISH | ||
| 082 | _a681.3.23.413 CIL | ||
| 100 | _aCiletti (Michael D) | ||
| 100 | _eAUTHOR | ||
| 245 | 0 | _aAdvanced Digital Design with the Verilog HDL | |
| 260 | _c2005 | ||
| 260 | _cPrentice -Hall Of India | ||
| 300 | _bPaper | ||
| 300 | _ePaper Pack | ||
| 300 | _gNO | ||
| 365 | _b0 | ||
| 365 | _b495 | ||
| 365 | _d1 | ||
| 504 | _a22.5 | ||
| 520 | _aDigital Design;VHDL | ||
| 650 | _aDigital Design;VHDL | ||
| 942 | _cBK | ||
| 999 |
_c37791 _d37791 |
||