| 000 | 00506nam a2200193Ia 4500 | ||
|---|---|---|---|
| 008 | 191125s9999 xx 000 0 und d | ||
| 020 | _a9788131732564 | ||
| 041 | _a22+727 | ||
| 041 | _aENGLISH | ||
| 082 | _a681.3.23.413 CIL | ||
| 100 | _aCiletti (Michael D) | ||
| 245 | 0 | _aModeling. Synthesis, and Rapid Prototyping With the Verilog HDL | |
| 250 | _n0 | ||
| 260 |
_bDorling Kindersely (India) Pvt Ltd _c22+727 |
||
| 365 |
_b725 _dRupees |
||
| 563 | _aPaper Pack | ||
| 650 | _aVHDL | ||
| 942 | _cBK | ||
| 999 |
_c72566 _d72566 |
||