| 000 -LEADER |
|---|
| fixed length control field |
00442nam a2200121Ia 4500 |
| 100 ## - MAIN ENTRY--AUTHOR NAME |
|---|
| Personal name |
"Jagadish Kumar (R), Dinesh (S), Suresh (K)" |
| 245 #0 - TITLE STATEMENT |
|---|
| Title |
Design of an FPGA Logic Element for Implementing a Synchronous Null Convention Logic Circuits |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
|---|
| Year of publication |
2008 |
| 700 ## - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Sudha (M) |
| 856 ## - ELECTRONIC LOCATION AND ACCESS |
|---|
| Uniform Resource Identifier |
http://library.kct.ac.in/opac-tmpl/bootstrap/THESIS/71204105021JAGADISHKUMAR.pdf |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Koha item type |
Project |
