Mahatma Gandhi Central LIbrary catalog › Results of search for 'au:"Jagadish Kumar (R), Dinesh (S), Suresh (K)"'

	1.	No cover image available Design of an FPGA Logic Element for Implementing a Synchronous Null Convention Logic Circuits by "Jagadish Kumar (R), Dinesh (S), Suresh (K)" \| [AUTHOR] \| Sudha (M). Publisher: 2008Availability: No items available Add to your cart (remove)
	2.	No cover image available Design of an FPGA Logic Element for Implementing a Synchronous Null Convention Logic Circuits by "Jagadish Kumar (R), Dinesh (S), Suresh (K)" \| Sudha (M). Publisher: 2008Online access: Click here to access online Availability: Items available for loan: Kumaraguru College of Technology (1). Location(s): OPAC . Place hold Add to your cart (remove)

Mahatma Gandhi Central LIbrary